
DS1337 I
2C Serial Real-Time Clock
HANDLING, PC BOARD LAYOUT, AND ASSEMBLY
The DS1337C package contains a quartz tuning-fork crystal. Pick-and-place equipment may be used, but
precautions should be taken to ensure that excessive shocks are avoided. Ultrasonic cleaning should be avoided
to prevent damage to the crystal.
Avoid running signal traces under the package, unless a ground plane is placed between the package and the
signal line. All N.C. (no connect) pins must be connected to ground.
Moisture-sensitive packages are shipped from the factory dry-packed. Handling instructions listed on the package
label must be followed to prevent damage during reflow. Refer to the IPC/JEDEC J-STD-020 standard for
moisture-sensitive device (MSD) classifications.
PIN CONFIGURATIONS
TOP VIEW
SCL
SDA
DS1337C
SQW/
INTB
GND
CHIP INFORMATION
TRANSISTOR COUNT: 10,950
PROCESS: CMOS
THERMAL INFORMATION
PACKAGE
THETA-JA
(°C/W)
THETA-JC
(°C/W)
8 DIP
110
40
8 SO
170
40
8 μSOP
229
39
16 SO
73
23
PACKAGE INFORMATION
For the latest package outline information and land patterns, go to
PACKAGE TYPE
PACKAGE CODE
DOCUMENT NO.
8 PDIP
P8+8
8 SO
S8+2
21-0041
8
MAX
U8+1
16 SO
W16-H2
DIP
INTA
VCC
INTA
VCC
X1
VCC
X1
N.C.
DS1337
N.C.
SQW
/INTB
X2
SQW
/INTB
X2
DS1337
N.C.
SCL
INTA
SCL
N.C.
SDA
GND
SDA
GND
N.C.
SO, SOP
N.C.
SO (300 mils)